public class GenerateVHDL extends Topology
Modifier and Type | Class and Description |
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static class |
GenerateVHDL.VHDLPreferences |
Topology.CellAggregateSignal, Topology.CellNetInfo, Topology.CellSignal, Topology.MyCellInfo, Topology.Visitor
Output.OutputPreferences, Output.WriteJELIB
dataOutputStream, errorLogger, filePath, printWriter, quiet, stringWriter
Modifier and Type | Method and Description |
---|---|
protected boolean |
canParameterizeNames()
Method to tell the netlister to mangle cell names that are parameterized.
|
static java.util.List<java.lang.String> |
convertCell(Cell cell,
GenerateVHDL.VHDLPreferences vp)
Method to convert a cell to a list of strings with VHDL in them.
|
protected void |
done()
Abstract method called after traversal
|
protected java.lang.String |
getGlobalName(Global glob)
Method to return the proper name of a Global signal
|
protected java.lang.String |
getGroundName(Network net)
Method to return the proper name of Ground (just use whatever name is there)
|
protected java.lang.String |
getPowerName(Network net)
Method to return the proper name of Power (just use whatever name is there)
|
protected java.lang.String |
getSafeCellName(java.lang.String name)
Method to adjust a cell name to be safe for Verilog output.
|
protected java.lang.String |
getSafeNetName(java.lang.String name,
boolean bus)
Method to adjust a network name to be safe for VHDL output.
|
protected Netlist.ShortResistors |
getShortResistors()
Method to tell the netlister how to short resistors
|
protected boolean |
isAggregateNameGapsSupported()
Method to decide whether aggregate names (busses) can have gaps in their ranges.
|
protected boolean |
isAggregateNamesSupported()
Method to report that aggregate names (busses) are not used.
|
protected boolean |
isCaseSensitive()
Method to tell the netlister to be case-sensitive.
|
protected boolean |
isLibraryNameAlwaysAddedToCellName()
Method to report that library names are not always prepended to cell names.
|
protected boolean |
isNetworksUseExportedNames()
Method to tell the netlister that export names DO take precedence over
arc names when determining the name of the network.
|
protected boolean |
isSeparateInputAndOutput()
Method to tell netlister not to separate input and output names (this module does more detailed separation).
|
protected boolean |
skipCellAndSubcells(Cell cell)
Method to tell the netlister to deal with all Cells.
|
protected void |
start()
Method to start the output.
|
protected void |
writeCellTopology(Cell cell,
Topology.CellNetInfo cni,
VarContext context,
Topology.MyCellInfo info)
Method to write one level of hierarchy.
|
enterCell, enumerateLayoutView, getCellNetInfo, getUniqueCellName, isChooseBestExportName, isShortExplicitResistors, isShortResistors, maxNameLength, parameterizedName, unIndexedName, validateSkippedCell, writeCell, writeCell
closeBinaryOutputStream, closeStringsOutputStream, closeTextOutputStream, emitCopyright, exportCellCommand, finishWrite, getAreaToPrint, getNumErrors, getNumWarnings, getOutputPreferences, openBinaryOutputStream, openStringsOutputStream, openTextOutputStream, reportError, reportWarning, saveJelib, setContinuationString, setOutputWidth, writeLibrary, writeLibrary, writePanicSnapshot, writeWidthLimited
public static java.util.List<java.lang.String> convertCell(Cell cell, GenerateVHDL.VHDLPreferences vp)
cell
- the Cell to convert.protected void start()
protected void done()
Topology
protected void writeCellTopology(Cell cell, Topology.CellNetInfo cni, VarContext context, Topology.MyCellInfo info)
writeCellTopology
in class Topology
protected java.lang.String getSafeCellName(java.lang.String name)
getSafeCellName
in class Topology
name
- the cell name.protected boolean skipCellAndSubcells(Cell cell)
skipCellAndSubcells
in class Topology
protected java.lang.String getPowerName(Network net)
getPowerName
in class Topology
protected java.lang.String getGroundName(Network net)
getGroundName
in class Topology
protected java.lang.String getGlobalName(Global glob)
getGlobalName
in class Topology
protected boolean isNetworksUseExportedNames()
isNetworksUseExportedNames
in class Topology
protected boolean isLibraryNameAlwaysAddedToCellName()
isLibraryNameAlwaysAddedToCellName
in class Topology
protected boolean isAggregateNamesSupported()
isAggregateNamesSupported
in class Topology
protected boolean isAggregateNameGapsSupported()
isAggregateNameGapsSupported
in class Topology
protected boolean isSeparateInputAndOutput()
isSeparateInputAndOutput
in class Topology
protected boolean isCaseSensitive()
isCaseSensitive
in class Topology
protected Netlist.ShortResistors getShortResistors()
getShortResistors
in class Topology
protected boolean canParameterizeNames()
canParameterizeNames
in class Topology
protected java.lang.String getSafeNetName(java.lang.String name, boolean bus)
getSafeNetName
in class Topology